1. Field of the Invention
The present invention relates to a display apparatus capable of displaying a television image (picture) on various types of plain display where pixels are arranged in a matrix form.
2. Description of the Prior Art
FIG. 1 is a schematic block diagram of a signal processing unit of a conventional display apparatus described in, for instance, Japanese KOKAI (Disclosure) patent application No. 56-4185 In the signal processing unit shown in FIG. 1, reference numeral 12 denotes a down counter; reference numeral 13 represents a flip-flop; reference numeral 14 indicates a pixel; reference numeral 15 is a video signal line; reference numeral 16 denotes an input line for a clock pulse; and reference numeral 17 indicates an input line for a set pulse.
As represented in FIG. 2, a large quantity of these components are arranged in a matrix form so as to constitute a single display unit 19. Furthermore, in order to improve the transmission efficiency of the image information to the various units, as illustrated in FIG. 3, a module 8 having a predetermined number of pixels is arranged and thus the data are separately transferred to the respective modules 8. It should be noted that reference numeral 7 indicates a buffer and reference numeral 9 represents a terminal unit.
An operation of the conventional display apparatus will now be described. In FIG. 3, each data in an effective segment of the television image (picture) is converted into a digital signal having a predetermined bit number (6 bits in the preferred embodiment) by an A/D converter 2. Then, the digital signal is sampling-processed in accordance with the pixel number of the screen by a predetermined timing signal outputted by a timing generating unit 4. The sampled data are transferred via a first bus 10 to the respective buffer memories 6 and once stored therein. The information is transferred to the respective modules 8 from the buffer memory 6 at a lower speed, as compared with the input velocity of the information which is input from the first bus 10.
In FIG. 4, there is shown a schematic diagram for explaining the data transfer speed conversion effected in the buffer memory 6. For instance, effective data included in 1 scanning line (1H) are subdivided among 3 groups of signals (denoted by H.sub.1, H.sub.2, H.sub.3 in FIG. 4). Then, these subdivided signals H.sub.1, H.sub.2, and H.sub.3 are stored in the buffer memory 6 during time periods W , W.sub.2, and W.sub.3, respectively. The write operations into the buffer memory 6 are performed when interval time periods P.sub.1, P.sub.2, and P.sub.3 have gone by after the write operations of the signals H.sub.1, H.sub.2, and H.sub.3 in the preceding scanning line have been accomplished. Thus, the read time periods P.sub.1, P.sub.2, and P.sub.3 can be established with respect to the write time periods W.sub.1, W.sub.2, and W.sub.3. It should be noted that the first bus 10 corresponds to a high-speed data bus through which the signal produced by directly A/D-converting the television image passes, whereas the second bus 11 corresponds to a low-speed data bus in which the data transfer speed is lowered. As a result, a flat cable can be utilized. In the second data bus 11, the data are successively transferred from the head address of the buffer memory 6 and the succeeding addresses. In the module 8, predetermined data are received based upon the addresses, and the received data are stored into a predetermined data memory unit 18 corresponding to the respective pixels.
The circuit shown in FIG. 1 is one example in which the present unit of the down counter 12 is utilized as the data memory unit 18. When the flip-flop 13 is turned ON in response to the set signal, the 6-bit video signal 15 is loaded on the down counter 12 at the same time. Immediately, this down counter 12 counts the clock and outputs a borrow signal at a time instant corresponding to the loaded data. Thus, the flip-flop 13 is turned OFF and then the counting operation by the down counter 12 is completed The flip-flop 13 has become of ON state during one of 64-step time widths in response to the data, so as to drive the pixels.
FIG. 5 is an explanatory diagram for representing a relationship between the scanning lines of the television signal and the pixels. In general, a television signal contains a large amount of information, and in a screen side, this television signal is utilized on condition that a number of the data of the television signal becomes even to the pixel number include in the screen by thinning out from this television signal. In the example shown in FIG. 5, the scanning lines (3, 3e) have been thinned out in accordance with the pixel numbers of the screen along the vertical direction. The similar thin out process or a change in the sampling period is carried out also in the horizontal direction of the screen, taking account of the pixel number of the screen along the horizontal direction. Since the data of the respective pixels are updated in synchronism with the television signal every 1 field (1/60 seconds in the NTSC TV system), the television image with 64 gradations is displayed on the screen (display unit 19) by repeating the above-described operation every pixels.
As previously described, in such a display apparatus, a portion of the entire information amount owned by the input signal has been utilized. As a consequence, the pixel number contained in the screen is restricted by the information amount of the television signal. For instance, the pixel number of the screen in the vertical direction is about 240 (a total scanning line within 1 field in the NTSC TV system) in case of the NTSC television signal, and similarly the pixel number thereof in the horizontal direction is limited by the sampling period.
Very recently, on the other hand, there is a trend on the screen that the higher density display is more required. That is to say, the total pixel number constituting the screen tends to be increased. The higher sampling speed is required for realizing the high density in the horizontal direction of the screen. Also, the total number of the scanning line is needed to be increased by way of, e.g., the interpolation method in order to realize the high density of the screen in the vertical direction in case that the pixel number of the screen in the vertical direction exceeds over the number of the effective scanning lines of the television signal (approximately 240 lines/field in case of the NTSC TV system).
Since the interpolation of data is performed in the vertical direction and the horizontal direction at the portion before the first bus 10, in general, transmitted information amount per unit time increases according to an increase in a pixel number of the screen (information amount in the screen).
As the conventional display apparatus is arranged with the above-described arrangement, if the information amount required for the high density of the display unit 19 tends to be increased there is a limitation in the actual screen size because the information amount of the data which can pass through the data transmission path per unit time (especially if a flat cable is employed as the data transmission path) is restricted.